In recent years, along with the rapid development of semiconductor technology, portable electronics and plane display products also become popular. Furthermore, thin film transistor (TFT) liquid crystal display (LCD) devices have become standard output devices for variety of data products since they have advantages such as a low operation voltage, no radiation scattering, a light weight and a small size, etc.
The TFT LCD device is generally formed by a pixel matrix aligned in both horizontal and vertical directions. When the TFT LCD device is displaying, gate electrode input signals are generated by a shift register, and each row of pixels are scanned from the first row to the last row sequentially. In the design of the TFT LCD device, there needs to design an appropriate shift register, to ensure its stability. Typically, the shift register is composed of multi-level shift register units connected in series wherein an output signal of a previous shift register unit is an input signal of a next level shift register unit.
In order to lower the manufacturing cost of the TFT LCD device, a multi-level amorphous silicon shift register is formed directly on a glass substrate of a panel by an amorphous silicon technology in the related art, in order to replace the well-known conventional gate driver, so as to achieve the object of lowering the manufacturing cost of the LCD device.
However, if an amorphous silicon material TFT is used, when it is subjected to voltage stresses, a threshold voltage thereof will be shifted, so that the driving capability of the TFT will deteriorate and thus the life of the LCD device will be shortened. Therefore, in the design of a circuit of an amorphous silicon shift register, it is desired to reduce the shifting of the threshold voltage of the TFT to ensure the shift register to work properly, i.e., to drive the entire liquid crystal panel normally, during the life of the LCD device. At the same time, within each frame time, when each row of the gate electrode output signals is set, the Gate on array (GOA) unit is charged to a high potential (VGH) by a clock signal (CLK); and when the scanning of this line is finished, the GOA unit is discharged to a low potential (VGL).
In a conventional structure of the shift register unit, in order to ensure that the shift register unit performs a normal signal output function, the internal TFTs are needed to be in a conductive (ON) state for a longer time, causing a power consumption of the shift register unit increased. Furthermore, with respect to the conventional shift register unit, in a half time of each frame, the gate electrode signal output end is pulled down; and in the other half time, the gate electrode signal output end is floating, which makes a higher noise existing in the conventional shift register unit and brings certain damage to the shift register circuit.